== Design of a pseudo-language for FPGA programming== 

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=== Mission  ===
Designing a psuedo-language based on the BASIC programming language, in order to lower the entry point for FPGA programming. The RC5 encryption scheme (Rivest's Cypher) will be ported to an FPGA using synthesizable verilog. The benefit of this would be scalability of encryption. This motive for porting the RC5 scheme using our new language is to prove the efficacy of the new language for writing FPGA programs


=== Presentations  ===
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%201.pptx"> Week 1 </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%202.pptx"> Week 2 </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%203.pptx"> Week 3  </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%204.pptx"> Week 4 </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%205.pptx"> Week 5 </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%207.pptx"> Week 7 </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%208%20.pptx"> Week 8 </a>
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<a href = "http://www.orbit-lab.org/attachment/wiki/Other/Summer/2017/FPGAEncryption/Week%209.pptx"> Week 9 </a>
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=== The Team ===

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    <td><center><img src="http://www.orbit-lab.org/raw-attachment/wiki/Other/Summer/2016/SDRSpectrumDrone/nick.jpg" height=300></center></td>
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    <td align='center'><b>Nicholas Lurski</b><br>Electrical and Computer Engineering<br><br><i>Rutgers University</i></td>
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    <td><center><img src="http://www.orbit-lab.org/raw-attachment/wiki/Other/Summer/2017/FPGAEncryption/zarir.png" height=300></center></td>
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    <td align='center'><b>Zarir Hamza</b><br>High School<br><br><i>Middlesex County Academy for Science, Mathematics and Engineering Technologies</i></td>
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<br><br>Project guided by Dr. Richard Martin.

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