Changes between Version 2 and Version 3 of Tutorials/k0SDR/Tutorial17
- Timestamp:
- Oct 9, 2015, 4:29:12 PM (9 years ago)
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Tutorials/k0SDR/Tutorial17
v2 v3 34 34 }}} 35 35 36 The PicoSDR2x2E block diagram shown below describes how all the peripherals interconnect with the embedded CPU (Quad-Core CPU) and FPGA (Virtex-6). 37 36 38 || [[Image(PicoSDR2x2E_BlockDiagram.PNG, width=500px)]] || 37 39 38 Since ''GNURadio_Radio420_PCIe_sx315.bit'' uses the PCI Express Bus to interface between the embedded PC (Quad-Core CPU)and carrier board's FPGA (Virtex-6), install the PCI Express Driver on the embedded PC:40 Since ''GNURadio_Radio420_PCIe_sx315.bit'' uses the PCI Express Bus to interface between the embedded PC and carrier board's FPGA (Virtex-6), install the PCI Express Driver on the embedded PC: 39 41 {{{ 40 42 cd /opt/Nutaq/ADP6/ADP_MicroTCA/sdk/PCIe/driver/host