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Zynq-based WISER platform - Building the Firmware
Table of Contents
- SDR Tutorials
Description
This tutorial is a quick guide for building the WISER Zynq-based firmware.
Getting the FPGA source code
- If using a Windows machine, create a folder D:/Repository/crkit_svn
- Checkout the source code from the SVN repository http://crkit.orbit-lab.org/svn/crkit
- crkit_svn/design/trunk/vivado_build/crkit_spec_sense.zip is the spectrum sensing application build. Uncompress the zip file, it gives a crkit_zd folder.
- Open crkit_zd.xpr, the Vivado project. The FPGA design consists of the CRKIT framework and the spectrum sensing receive application (instantiated as u_app_rx_bd). All the files here point to the source files in the repository D:/Repository/crkit_svn. In case the source files are located elsewhere, they will have to be added to the project.
- Edit the code as needed, synthesize, implement and generate the bit stream.
Building the FPGA design
Building ARM core software
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